LLM-Guided Neural Architecture Search for Robust Co-Design of Physical Neural Networks
Pith reviewed 2026-06-27 13:44 UTC · model grok-4.3
The pith
UH-NAS uses language models as evolutionary operators in a hardware-agnostic search to co-optimize neural network accuracy and energy on physical platforms.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
UH-NAS is a hardware-agnostic NAS framework that integrates language models as evolutionary operators to co-optimize accuracy and inference energy. Hardware is exposed as a swappable backend equipped with per-platform energy models, physical constraints, and non-ideality simulators, so the same search procedure works across backends. When tested on optical MZI hardware, UH-NAS produces architectures that are more diverse and robust to non-idealities than conventional baselines while also outperforming existing LLM-to-NAS methods.
What carries the argument
Unconventional Hardware Neural Architecture Search (UH-NAS) framework, in which LLMs act as evolutionary operators and hardware is handled through interchangeable energy models and non-ideality simulators.
If this is right
- The identical search procedure can be applied to multiple hardware platforms by swapping only the backend models, enabling fair cross-platform comparisons.
- Discovered architectures show improved robustness when non-idealities such as noise or precision loss are present.
- Performance exceeds both conventional NAS methods and earlier LLM-guided NAS techniques on the evaluated optical platform.
- Co-design of architecture with hardware-specific constraints becomes feasible without rewriting the search algorithm for each new platform.
Where Pith is reading between the lines
- The approach could shorten the time needed to adapt neural networks to newly emerging hardware technologies by reusing the same search logic.
- If simulator fidelity improves, the method might produce designs that transfer to physical devices with little additional fine-tuning.
- Similar LLM-driven evolutionary search might be applied to related co-design problems such as circuit layout or sensor placement.
Load-bearing premise
The per-platform energy models and non-ideality simulators must accurately capture real hardware behavior so that architectures found in simulation remain robust when transferred to physical devices.
What would settle it
Deploying the architectures discovered by UH-NAS on actual optical MZI hardware and checking whether they exhibit measurably higher robustness to real non-idealities and greater architectural diversity than the baselines.
Figures
read the original abstract
Deploying neural networks on unconventional hardware demands architectures that co-optimize task accuracy and platform-specific constraints such as energy cost, physical non-idealities, and numerical precision. Existing neural architecture search (NAS) methods are typically tailored to a single hardware family, limiting cross-platform comparison and generalization. We introduce Unconventional Hardware Neural Architecture Search (UH-NAS), a hardware-agnostic, LLM-guided NAS framework that integrates language models as evolutionary operators to co-optimize accuracy and inference energy. By exposing hardware as a swappable backend with per-platform energy models, physical constraints, and non-ideality simulators, UH-NAS enables fair system-level comparisons across various backends without modifying the search algorithm. Tested on optical MZI hardware, UH-NAS discovers more diverse, robust architectures than conventional baselines while outperforming existing LLM-to-NAS approaches. Additional ablations on architecture robustness under non-idealities and the role of system prompts highlight the importance of architecture-hardware co-design for emerging computing platforms.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper introduces Unconventional Hardware Neural Architecture Search (UH-NAS), a hardware-agnostic LLM-guided NAS framework that uses language models as evolutionary operators to co-optimize task accuracy and inference energy across swappable hardware backends. Each backend supplies per-platform energy models, physical constraints, and non-ideality simulators, enabling cross-platform comparisons without altering the search algorithm. Evaluated on optical MZI hardware, the method is claimed to yield more diverse and robust architectures than conventional NAS baselines and prior LLM-to-NAS approaches, with supporting ablations on non-ideality robustness and system-prompt effects.
Significance. If the empirical claims are substantiated by quantitative results, the work could advance hardware-aware NAS for emerging physical platforms by demonstrating a unified search procedure that incorporates platform-specific non-idealities while remaining algorithmically hardware-agnostic.
minor comments (1)
- [Abstract] The abstract reports outperformance and robustness ablations but supplies no quantitative results, error bars, dataset sizes, or statistical tests.
Simulated Author's Rebuttal
We thank the referee for their summary of the manuscript and for noting the potential significance of UH-NAS for hardware-aware NAS on unconventional platforms. The recommendation is listed as uncertain, yet the report contains no specific major comments to address. We remain available to provide additional quantitative details, ablations, or clarifications on the empirical claims if requested by the editor or referee.
Circularity Check
No significant circularity
full rationale
The paper introduces UH-NAS as an LLM-guided NAS framework with swappable hardware backends for co-optimizing accuracy and energy. All central claims rest on empirical comparisons of discovered architectures against baselines on optical MZI models, with no equations, fitted parameters, or derivations presented that reduce to self-definition, renamed inputs, or self-citation chains. The method treats energy models and simulators as external oracles and reports search outcomes under that assumption; the argument does not contain any load-bearing step that is equivalent to its own inputs by construction.
Axiom & Free-Parameter Ledger
Reference graph
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Design linear blocks to be as shallow as possible and avoid unnecessary ReLU activations within the optical domain to reduce electronic energy and phase noise sensitivity
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Prioritize optical linear and convolutional operations over electronic ones, as they consume significantly less energy (∼20fJ/MAC), and ensure they are arranged after the transition point (Flatten or AdaptPool)
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Minimize the number of MZI components by avoiding overly wide layers, since MZI count scales quadratically; choose layer widths that balance expressivity with hardware complexity
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Figure 8.Example synthesized system prompt from the meta-learning phase (GPT-4.1-nano)
Design the network with a single transition point followed by MZI-based linear blocks to limit electronic boundary crossings, thereby conserving energy and reducing crosstalk pathways. Figure 8.Example synthesized system prompt from the meta-learning phase (GPT-4.1-nano). The underlined sentence contains a factual error: namely that optical MACs at∼20fJ a...
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Introduce dropout after MZI layers to improve tolerance to crosstalk and random phase errors—dropout acts as a regularizer against structured analog noise
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Minimize the number of electronic ReLU activations, since their per-element energy cost far exceeds that of optical MACs; use them only where nonlinearity is crucial for expressivity
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Exploit the efficiency of Conv2d blocks for early spatial feature extraction, as they are native to the hardware and do not incur extra ADC/DAC energy penalty
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Be aware that crosstalk in MZI meshes couples adjacent outputs within each miniblock—avoid excessive width increases that exacerbate cumulative crosstalk
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Constrain layer widths and output channels to multiples of 8 (except the classifier head) to align with hardware-friendly quantization and mesh partitioning
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Use only a single transition point (Flatten or AdaptPool) between Conv and MZI blocks, respecting the mesh’s lack of native support for skip/residual connections
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Favor architectures that separate spatial processing (Conv2d) and dense classification (MZI Linear), leveraging each domain’s strengths and minimizing unnecessary domain crossings
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Figure 9.Example synthesized system prompt from the meta-learning phase (GPT-4.1)
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[74]
Prioritize BN (Batch Normalization) in every MZI layer to normalize signal variance, which is critical for mitigating the impact of phase noise (std=0.05) on weight precision
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[75]
Minimize the use of ReLU activations; since they cost ∼10 pJ/element vs ∼20 fJ/MAC for optical operations, use them only where non-linearity is strictly required for convergence
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[76]
Exploit the miniblock (k=4) structure by grouping highly correlated features together, as crosstalk is localized within these miniblocks
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[77]
Use MZILinearDrop to combat the 0.15 crosstalk factor; dropout acts as a structural regularizer that forces the network to learn redundant representations less sensitive to local hardware fluctuations
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[78]
Favor ConvK1BNReLU for channel mixing over massive linear layers to keep the MZI count ( O(N 2)) manageable and reduce the accumulation of phase noise
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[79]
Balance the depth of the Conv front-end against the MZI back-end; deeper architectures increase the total MZI count, thereby multiplying the cumulative phase noise impact
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When non-ideal accuracy drops significantly, prefer widening the layer slightly over increasing depth, as depth leads to faster signal degradation due to the lack of skip connections
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